Job Details


Experience: 5-20 years | Salary: NA | Opening(s): Mulitple | Posted Date : 10-10-2024
Hiring For Senior ASIC/SoC RTL Engineer /Lead/Managers
Job Description Senior ASIC/SoC RTL Engineer /Lead/Managers
Desired Profile

 

Skills : Expertise in SoC/IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog, AMBA bus protocols (AXI, AHB,ATB, APB), interface protocols, scripting languages like Make flow, Perl ,shell, python

Notice Period: 0- 45 days

Specific Domain / Industry: RTL Design

Education Technical graduation along with exact domain experience
Location Bangalore, Chennai, Hyderabad, Kochi, Pune, Noida, Ahmedabad
Email career@krazymantra.com