Job Details

Experience: 6+ years | Salary: NA | Opening(s): Multiple | Posted Date : 23-01-2024

Hiring For	Design Verification Engineer
Job Description	Design Verification Engineer
Desired Profile	Skills : System Verilog and UVM, PCIe, Ethernet , Solid Linux environment skill, verification Experience: 6+ years of experience in pre-silicon RTL Verification /IP Verification / SOC verification, Strong knowledge of System Verilog and working knowledge of recent verification methodologies Notice Period: 0- 60 days Area of expertise: System Verilog and UVM, PCIe, Ethernet
Education	BE/ B.Tech/ Master degree in Electrical Engineering or Computer Science
Location	Bangalore, Hyderabad and Ahmedabad
Email	career@krazymantra.com